Design of the SPI slave based on gate arrays
Abstract
Design of the SPI slave based on gate arrays
Incoming article date: 10.10.2023Results of the Serial Peripheral Interface (SPI) Slave node design based on gate arrays 5503 series are presented in this paper. SPI is used for high-speed synchronous data transmission between control and peripheral devices. Developed chip could be applied in connection with SPI Master node for matching microcontrollers and microprocessors with different sensors, analog-to-digital and digital-to-analog converters, memory and communication units. Upon the results of the development, design approach of digital integrated circuits is proposed. The approach supposes using Russian freeware CAD "Kovcheg" ("Ark") designated for gate arrays design (IC based on prefabricated crystals, components on which are supposed to be interconnected during design to form logic devices). According to the proposed approach, behavioural descriptions of the devices, written on hardware description languages (e.g. Verilog), are used, since it is often easier to describe circuit operational principal algorithmically than construct structure from components library. The problem is that "Kovcheg" can't execute structural synthesis of the circuit from behavioural description. So it is proposed in the approach to use outside CAD environments, intended even for design of custom full-integrated circuits (like Cadence) or FPGA (like Vivado), to synthesize structural description of desired device from known behavioural ones and available process design kits (PDK) or library, appropriate for the chosen CAD. The entire design cycle using "Kovcheg" is outlined in the paper.
Keywords: gate arrays, serial peripheral interface, hardware description language, computer-aided design